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» Mechanisms for Mapping High-Level Parallel Performance Data
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ISCA
2003
IEEE
114views Hardware» more  ISCA 2003»
15 years 6 months ago
Exploiting ILP, TLP and DLP with the Polymorphous TRIPS Architecture
This paper describes the polymorphous TRIPS architecture which can be configured for different granularities and types of parallelism. TRIPS contains mechanisms that enable the p...
Karthikeyan Sankaralingam, Ramadass Nagarajan, Hai...
HPCA
2001
IEEE
16 years 1 months ago
Speculative Data-Driven Multithreading
Mispredicted branches and loads that miss in the cache cause the majority of retirement stalls experienced by sequential processors; we call these critical instructions. Despite t...
Amir Roth, Gurindar S. Sohi
HPCA
2007
IEEE
15 years 7 months ago
An Adaptive Cache Coherence Protocol Optimized for Producer-Consumer Sharing
Shared memory multiprocessors play an increasingly important role in enterprise and scientific computing facilities. Remote misses limit the performance of shared memory applicat...
Liqun Cheng, John B. Carter, Donglai Dai
PAKDD
2009
ACM
157views Data Mining» more  PAKDD 2009»
15 years 5 months ago
Analysis of Variational Bayesian Matrix Factorization
Abstract. Recently, the variational Bayesian approximation was applied to probabilistic matrix factorization and shown to perform very well in experiments. However, its good perfor...
Shinichi Nakajima, Masashi Sugiyama
CLUSTER
2009
IEEE
15 years 8 months ago
Analyzing massive astrophysical datasets: Can Pig/Hadoop or a relational DBMS help?
Abstract— As the datasets used to fuel modern scientific discovery grow increasingly large, they become increasingly difficult to manage using conventional software. Parallel d...
Sarah Loebman, Dylan Nunley, YongChul Kwon, Bill H...