206 search results - page 26 / 42 » Mechanisms for store-wait-free multiprocessors |
TC
2010
14 years 10 months ago
2010
—The number of CPUs in chip multiprocessors is growing at the Moore’s Law rate, due to continued technology advances. However, new technologies pose serious reliability challen...
DATE
2009
IEEE
15 years 6 months ago
2009
IEEE
Abstract—Networks-on-chip (NoC) for general-purpose multiprocessors require quality of service mechanisms to allow realtime streaming applications to be executed along with laten...
119
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ISHPC
2003
Springer
15 years 5 months ago
2003
Springer
Simultaneous multithreaded processors use shared on-chip caches, which yield better cost-performance ratios. Sharing a cache between simultaneously executing threads causes excessi...
CN
2008
14 years 12 months ago
2008
Overload control mechanisms such as admission control and connection differentiation have proven effective for preventing overload of application servers running secure web applic...
116
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ISCA
2011
IEEE
14 years 3 months ago
2011
IEEE
Chip multiprocessors (CMPs) share a large portion of the memory subsystem among multiple cores. Recent proposals have addressed high-performance and fair management of these share...