Verification conditions (VCs) are logical formulae whose validity implies the correctness of a program with respect to a specification. The technique of checking software properti...
Abstract. Existing tools for supporting parallel work feature some disadvantages that prevent them to be widely used. Very often they require a complex installation and creation of...
There is currently a lack of rich description attached to materials science content available on the Web as well as usercentered tools to attach such description. Dublin Core (DC)...
Abstract—As the rapid expansion of smart phones and associated data-intensive applications continues, we expect to see renewed interest in dynamic prioritization schemes as a way...
Victor Shnayder, Jeremy Hoon, David C. Parkes, Vik...
Timed Interval Calculus (TIC) is a highly expressive set-based notation for specifying and reasoning about embedded real-time systems. However, it lacks mechanical proving support...