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ETS
2007
IEEE
128views Hardware» more  ETS 2007»
15 years 6 months ago
Selecting Power-Optimal SBST Routines for On-Line Processor Testing
Software-Based Self-Test (SBST) has emerged as an effective strategy for on-line testing of processors integrated in non-safety critical embedded system applications. Among the mo...
Andreas Merentitis, Nektarios Kranitis, Antonis M....
DAC
2008
ACM
15 years 6 months ago
Protecting bus-based hardware IP by secret sharing
Our work addresses protection of hardware IP at the mask level with the goal of preventing unauthorized manufacturing. The proposed protocol based on chip locking and activation i...
Jarrod A. Roy, Farinaz Koushanfar, Igor L. Markov
EDCC
2008
Springer
15 years 6 months ago
Practical Setup Time Violation Attacks on AES
Faults attacks are a powerful tool to break some implementations of robust cryptographic algorithms such as AES [8] and DES [3]. Various methods of faults attack on cryptographic ...
Nidhal Selmane, Sylvain Guilley, Jean-Luc Danger
EDCC
2008
Springer
15 years 6 months ago
Metrics for Object-Oriented Software Reliability Assessment - Application to a Flight Manager
In avionics domain, the software applications grew to millions of source lines of code representing important development expenditures. To cut the costs, the avionics suppliers ar...
Stéphanie Gaudan, Gilles Motet, Guillaume A...
ESTIMEDIA
2008
Springer
15 years 6 months ago
A framework for memory-aware multimedia application mapping on chip-multiprocessors
The relentless increase in multimedia embedded system application requirements as well as improvements in IC design technology have motivated the deployment of chip multiprocessor ...
Luis Angel D. Bathen, Nikil D. Dutt, Sudeep Pasric...
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