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» Memory Dependence Prediction Using Store Sets
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156
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SSDBM
1999
IEEE
140views Database» more  SSDBM 1999»
15 years 6 months ago
An Infrastructure for Scalable Parallel Multidimensional Analysis
Multidimensional Analysis in On-Line Analytical Processing (OLAP), and Scientific and statistical databases (SSDB) use operations requiring summary information on multi-dimensiona...
Sanjay Goil, Alok N. Choudhary
DAC
2005
ACM
16 years 2 months ago
Memory access optimization through combined code scheduling, memory allocation, and array binding in embedded system design
In many of embedded systems, particularly for those with high data computations, the delay of memory access is one of the major bottlenecks in the system's performance. It ha...
Jungeun Kim, Taewhan Kim
105
Voted
IPPS
2008
IEEE
15 years 8 months ago
Modeling and predicting application performance on parallel computers using HPC challenge benchmarks
A method is presented for modeling application performance on parallel computers in terms of the performance of microkernels from the HPC Challenge benchmarks. Specifically, the a...
Wayne Pfeiffer, Nicholas J. Wright
IEEEPACT
2006
IEEE
15 years 8 months ago
Branch predictor guided instruction decoding
Fast instruction decoding is a challenge for the design of CISC microprocessors. A well-known solution to overcome this problem is using a trace cache. It stores and fetches alrea...
Oliverio J. Santana, Ayose Falcón, Alex Ram...
116
Voted
ET
2008
92views more  ET 2008»
15 years 1 months ago
Hardware and Software Transparency in the Protection of Programs Against SEUs and SETs
Processor cores embedded in systems-on-a-chip (SoCs) are often deployed in critical computations, and when affected by faults they may produce dramatic effects. When hardware harde...
Eduardo Luis Rhod, Carlos Arthur Lang Lisbôa...