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» Memory Design for Constrained Dynamic Optimization Problems
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ICCD
2004
IEEE
106views Hardware» more  ICCD 2004»
15 years 11 months ago
Gate Sizing and V{t} Assignment for Active-Mode Leakage Power Reduction
Leakage current is a key factor in IC power consumption even in the active operating mode. We investigate the simultaneous optimization of gate size and threshold voltage to reduc...
Feng Gao, John P. Hayes
DAC
2005
ACM
16 years 2 months ago
Flexible ASIC: shared masking for multiple media processors
ASIC provides more than an order of magnitude advantage in terms of density, speed, and power requirement per gate. However, economic (cost of masks) and technological (deep micro...
Jennifer L. Wong, Farinaz Koushanfar, Miodrag Potk...
DAC
1997
ACM
15 years 6 months ago
Wire Segmenting for Improved Buffer Insertion
Buffer insertion seeks to place buffers on the wires of a signal net to minimize delay. Van Ginneken [14] proposed an optimal dynamic programming solution (with extensions propose...
Charles J. Alpert, Anirudh Devgan
ECAI
2010
Springer
15 years 2 months ago
Mining Outliers with Adaptive Cutoff Update and Space Utilization (RACAS)
Recently the efficiency of an outlier detection algorithm ORCA was improved by RCS (Randomization with faster Cutoff update and Space utilization after pruning), which changes the ...
Chi-Cheong Szeto, Edward Hung
GECCO
2007
Springer
154views Optimization» more  GECCO 2007»
15 years 8 months ago
A multi-objective approach to search-based test data generation
There has been a considerable body of work on search–based test data generation for branch coverage. However, hitherto, there has been no work on multi–objective branch covera...
Kiran Lakhotia, Mark Harman, Phil McMinn