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» Memory Design for Constrained Dynamic Optimization Problems
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CODES
2005
IEEE
15 years 3 months ago
SOMA: a tool for synthesizing and optimizing memory accesses in ASICs
Arbitrary memory dependencies and variable latency memory systems are major obstacles to the synthesis of large-scale ASIC systems in high-level synthesis. This paper presents SOM...
Girish Venkataramani, Tiberiu Chelcea, Seth Copen ...
PLDI
1999
ACM
15 years 1 months ago
Load-Reuse Analysis: Design and Evaluation
Load-reuse analysis finds instructions that repeatedly access the same memory location. This location can be promoted to a register, eliminating redundant loads by reusing the re...
Rastislav Bodík, Rajiv Gupta, Mary Lou Soff...
EC
2008
120views ECommerce» more  EC 2008»
14 years 9 months ago
Genetic Algorithms with Memory- and Elitism-Based Immigrants in Dynamic Environments
In recent years the genetic algorithm community has shown a growing interest in studying dynamic optimization problems. Several approaches have been devised. The random immigrants...
Shengxiang Yang
94
Voted
EMSOFT
2010
Springer
14 years 7 months ago
Optimal WCET-aware code selection for scratchpad memory
We propose the first polynomial-time code selection algorithm for minimising the worst-case execution time of a nonnested loop executed on a fully pipelined processor that uses sc...
Hui Wu, Jingling Xue, Sridevan Parameswaran
INFOCOM
2005
IEEE
15 years 3 months ago
Interference-aware routing in multihop wireless networks using directional antennas
— Recent research has shown that interference can make a significant impact on the performance of multihop wireless networks. Researchers have studied interference-aware topolog...
Jian Tang, Guoliang Xue, Christopher Chandler, Wei...