1184 search results - page 80 / 237 » Memory Design for Constrained Dynamic Optimization Problems |
153
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MICRO
2002
IEEE
15 years 7 months ago
2002
IEEE
Pre-execution attacks cache misses for which conventional address-prediction driven prefetching is ineffective. In pre-execution, copies of cache miss computations are isolated fr...
138
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DAC
2004
ACM
16 years 3 months ago
2004
ACM
Just-in-time (JIT) compilation has previously been used in many applications to enable standard software binaries to execute on different underlying processor architectures. Howev...
161
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PE
2000
Springer
15 years 2 months ago
2000
Springer
Conventional methods for state space exploration are limited to the analysis of small systems because they suffer from excessive memory and computational requirements. We have dev...
141
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PC
2007
15 years 1 months ago
2007
The Sony–Toshiba–IBM Cell Broadband Engine (Cell/B.E.) is a heterogeneous multicore architecture that consists of a traditional microprocessor (PPE) with eight SIMD co-process...
134
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CASES
2010
ACM
15 years 15 days ago
2010
ACM
Dynamic binary translators (DBTs) are becoming increasingly important because of their power and flexibility. However, the high memory demands of DBTs present an obstacle for all ...