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» Memory Exploration for Low Power, Embedded Systems
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DAC
2007
ACM
16 years 5 months ago
Hardware Support for Secure Processing in Embedded Systems
The inherent limitations of embedded systems make them particularly vulnerable to attacks. We have developed a hardware monitor that operates in parallel to the embedded processor...
Shufu Mao, Tilman Wolf
VLSISP
2008
239views more  VLSISP 2008»
15 years 4 months ago
An Embedded Real-Time Surveillance System: Implementation and Evaluation
This paper presents the design of an embedded automated digital video surveillance system with real-time performance. Hardware accelerators for video segmentation, morphological op...
Fredrik Kristensen, Hugo Hedberg, Hongtu Jiang, Pe...
ASAP
2005
IEEE
112views Hardware» more  ASAP 2005»
15 years 10 months ago
On the Advantages of Serial Architectures for Low-Power Reliable Computations
This paper explores low-power reliable microarchitectures for addition. Power, speed, and reliability (both defect- and fault-tolerance) are important metrics of system design, sp...
Valeriu Beiu, Snorre Aunet, Jabulani Nyathi, Ray R...
GLVLSI
2008
IEEE
140views VLSI» more  GLVLSI 2008»
15 years 11 months ago
A table-based method for single-pass cache optimization
Due to the large contribution of the memory subsystem to total system power, the memory subsystem is highly amenable to customization for reduced power/energy and/or improved perf...
Pablo Viana, Ann Gordon-Ross, Edna Barros, Frank V...
ISQED
2008
IEEE
154views Hardware» more  ISQED 2008»
15 years 10 months ago
Error Protected Data Bus Inversion Using Standard DRAM Components
Off-chip communication consumes a significant part of main memory system power. Existing solutions imply the use of specialized memories or assume error free environments. This i...
Maurizio Skerlj, Paolo Ienne