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ISCA
2006
IEEE
154views Hardware» more  ISCA 2006»
15 years 3 months ago
SODA: A Low-power Architecture For Software Radio
The physical layer of most wireless protocols is traditionally implemented in custom hardware to satisfy the heavy computational requirements while keeping power consumption to a ...
Yuan Lin, Hyunseok Lee, Mark Woh, Yoav Harel, Scot...
HIPC
1999
Springer
15 years 1 months ago
Microcaches
We describe a radically new cache architecture and demonstrate that it offers a huge reduction in cache cost, size and power consumption whilst maintaining performance on a wide ra...
David May, Dan Page, James Irwin, Henk L. Muller
ISHPC
2003
Springer
15 years 2 months ago
Code and Data Transformations for Improving Shared Cache Performance on SMT Processors
Simultaneous multithreaded processors use shared on-chip caches, which yield better cost-performance ratios. Sharing a cache between simultaneously executing threads causes excessi...
Dimitrios S. Nikolopoulos
SIGMOD
2000
ACM
138views Database» more  SIGMOD 2000»
15 years 1 months ago
TerraServer: A Spatial Data Warehouse
Microsoft® TerraServer stores aerial, satellite, and topographic images of the earth in a SQL database available via the Internet. It is the world’s largest online atlas, combi...
Tom Barclay, Donald R. Slutz, Jim Gray
ISLPED
2004
ACM
159views Hardware» more  ISLPED 2004»
15 years 2 months ago
Dynamic voltage scaling for systemwide energy minimization in real-time embedded systems
Traditionally, dynamic voltage scaling (DVS) techniques have focused on minimizing the processorenergy consumption as opposed to the entire system energy consumption. The slowdown...
Ravindra Jejurikar, Rajesh K. Gupta