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DAC
2006
ACM
15 years 11 months ago
Efficient simulation of critical synchronous dataflow graphs
Simulation and verification using electronic design automation (EDA) tools are key steps in the design process for communication and signal processing systems. The synchronous dat...
Chia-Jui Hsu, José Luis Pino, Ming-Yung Ko,...
ASPLOS
2009
ACM
15 years 10 months ago
Phantom-BTB: a virtualized branch target buffer design
Modern processors use branch target buffers (BTBs) to predict the target address of branches such that they can fetch ahead in the instruction stream increasing concurrency and pe...
Ioana Burcea, Andreas Moshovos
VLSID
2004
IEEE
209views VLSI» more  VLSID 2004»
15 years 10 months ago
An Architecture for Motion Estimation in the Transform Domain
demanding algorithm of a video encoder. It is known that about 60% ~ 80% of the total computation time is consumed for motion estimation [1]. The second is its high impact on the v...
J. Lee, Narayanan Vijaykrishnan, Mary Jane Irwin, ...
POPL
2006
ACM
15 years 10 months ago
Autolocker: synchronization inference for atomic sections
The movement to multi-core processors increases the need for simpler, more robust parallel programming models. Atomic sections have been widely recognized for their ease of use. T...
Bill McCloskey, Feng Zhou, David Gay, Eric A. Brew...
PAM
2010
Springer
15 years 4 months ago
Network DVR: A Programmable Framework for Application-Aware Trace Collection
Network traces are essential for a wide range of network applications, including traffic analysis, network measurement, performance monitoring, and security analysis. Existing cap...
Chia-Wei Chang, Alexandre Gerber, Bill Lin, Subhab...