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INTERACT
2007
14 years 11 months ago
The Challenges of Creating Connections and Raising Awareness: Experience from UCLIC
With current disciplinary structures and academic priorities, Human– Computer Interaction faces ongoing challenges: is it a discipline in its own right, or simply a sub-disciplin...
Ann Blandford, Rachel Benedyk, Nadia Berthouze, An...
IEEEPACT
1998
IEEE
15 years 2 months ago
Athapascan-1: On-Line Building Data Flow Graph in a Parallel Language
In order to achieve practical efficient execution on a parallel architecture, a knowledge of the data dependencies related to the application appears as the key point for building...
François Galilée, Jean-Louis Roch, G...
ICPP
2009
IEEE
15 years 4 months ago
Complexity Analysis and Performance Evaluation of Matrix Product on Multicore Architectures
The multicore revolution is underway, bringing new chips introducing more complex memory architectures. Classical algorithms must be revisited in order to take the hierarchical me...
Mathias Jacquelin, Loris Marchal, Yves Robert
FMCAD
2009
Springer
15 years 4 months ago
Finding heap-bounds for hardware synthesis
Abstract—Dynamically allocated and manipulated data structures cannot be translated into hardware unless there is an upper bound on the amount of memory the program uses during a...
Byron Cook, Ashutosh Gupta, Stephen Magill, Andrey...
ATS
2003
IEEE
126views Hardware» more  ATS 2003»
15 years 3 months ago
Analyzing the Impact of Process Variations on DRAM Testing Using Border Resistance Traces
Abstract: As a result of variations in the fabrication process, different memory components are produced with different operational characteristics, a situation that complicates th...
Zaid Al-Ars, A. J. van de Goor