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» Memory System Connectivity Exploration
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DATE
2002
IEEE
104views Hardware» more  DATE 2002»
15 years 8 months ago
Hardware-Assisted Data Compression for Energy Minimization in Systems with Embedded Processors
In this paper, we suggest hardware-assisted data compression as a tool for reducing energy consumption of core-based embedded systems. We propose a novel and e cient architecture ...
Luca Benini, Davide Bruni, Alberto Macii, Enrico M...
JSA
2000
115views more  JSA 2000»
15 years 3 months ago
Scheduling optimization through iterative refinement
Scheduling DAGs with communication times is the theoretical basis for achieving efficient parallelism on distributed memory systems. We generalize Graham's task-level in a ma...
Mayez A. Al-Mouhamed, Adel Al-Massarani
ICDE
2008
IEEE
125views Database» more  ICDE 2008»
16 years 4 months ago
Just-In-Time Processing of Continuous Queries
In a data stream management system, a continuous query is processed by an execution plan consisting of multiple operators connected via the "consumer-producer" relationsh...
Yin Yang, Dimitris Papadias
ISCA
1998
IEEE
114views Hardware» more  ISCA 1998»
15 years 7 months ago
The MIT Alewife Machine: Architecture and Performance
Alewife is a multiprocessor architecture that supports up to 512 processing nodes connected over a scalable and cost-effective mesh network at a constant cost per node. The MIT Al...
Anant Agarwal, Ricardo Bianchini, David Chaiken, K...
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LICS
2000
IEEE
15 years 7 months ago
Precongruence Formats for Decorated Trace Preorders
This paper explores the connection between semantic equivalences and preorders for concrete sequential processes, represented by means of labelled transition systems, and formats ...
Bard Bloom, Wan Fokkink, Rob J. van Glabbeek