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ESANN
2008
15 years 1 months ago
Using graph-theoretic measures to predict the performance of associative memory models
We test a selection of associative memory models built with different connection strategies, exploring the relationship between the structural properties of each network and its pa...
Lee Calcraft, Rod Adams, Weiliang Chen, Neil Davey
CODES
2006
IEEE
15 years 5 months ago
Yield prediction for architecture exploration in nanometer technology nodes: : a model and case study for memory organizations
Process variability has a detrimental impact on the performance of memories and other system components, which can lead to parametric yield loss at the system level due to timing ...
Antonis Papanikolaou, T. Grabner, Miguel Miranda, ...
VLSISP
2008
147views more  VLSISP 2008»
14 years 10 months ago
Data Reuse Exploration for Low Power Motion Estimation Architecture Design in H.264 Encoder
Data access usually leads to more than 50% of the power cost in a modern signal processing system. To realize a low-power design, how to reduce the memory access power is a critica...
Yu-Han Chen, Tung-Chien Chen, Chuan-Yung Tsai, Sun...
JSA
2007
162views more  JSA 2007»
14 years 11 months ago
Exploration of distributed shared memory architectures for NoC-based multiprocessors
Multiprocessor system-on-chip (MP-SoC) platforms represent an emerging trend for embedded multimedia applications. To enable MP-SoC platforms, scalable communication-centric inter...
Matteo Monchiero, Gianluca Palermo, Cristina Silva...
VLSID
2008
IEEE
138views VLSI» more  VLSID 2008»
16 years 20 hour ago
Memory Architecture Exploration Framework for Cache Based Embedded SOC
Today's feature-rich multimedia products require embedded system solution with complex System-on-Chip (SoC) to meet market expectations of high performance at a low cost and l...
T. S. Rajesh Kumar, C. P. Ravikumar, R. Govindaraj...