Sciweavers

820 search results - page 81 / 164
» Memory System Connectivity Exploration
Sort
View
ESTIMEDIA
2005
Springer
15 years 8 months ago
Scratchpad Sharing Strategies for Multiprocess Embedded Systems: A First Approach
Portable embedded systems require diligence in managing their energy consumption. Thus, power efficient processors coupled with onchip memories (e.g. caches, scratchpads) are the...
Manish Verma, Klaus Petzold, Lars Wehmeyer, Heiko ...
SPIN
2005
Springer
15 years 8 months ago
Execution Generated Test Cases: How to Make Systems Code Crash Itself
Abstract. This paper presents a technique that uses code to automatically generate its own test cases at run-time by using a combination of symbolic and concrete (i.e., regular) ex...
Cristian Cadar, Dawson R. Engler
ICCAD
1996
IEEE
119views Hardware» more  ICCAD 1996»
15 years 7 months ago
An algorithm for synthesis of system-level interface circuits
We describe an algorithm for the synthesis and optimization of interface circuits for embedded system components such as microprocessors, memory ASIC, and network subsystems with ...
Ki-Seok Chung, Rajesh K. Gupta, C. L. Liu
ATAL
2009
Springer
15 years 10 months ago
Of robot ants and elephants
Investigations of multi-robot systems often make implicit assumptions concerning the computational capabilities of the robots. Despite the lack of explicit attention to the comput...
Asaf Shiloni, Noa Agmon, Gal A. Kaminka
ISLPED
2005
ACM
150views Hardware» more  ISLPED 2005»
15 years 8 months ago
Fast configurable-cache tuning with a unified second-level cache
Tuning a configurable cache subsystem to an application can greatly reduce memory hierarchy energy consumption. Previous tuning methods use a level one configurable cache only, or...
Ann Gordon-Ross, Frank Vahid, Nikil D. Dutt