3202 search results - page 104 / 641 » Memory access scheduling |
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GRID
2004
Springer
15 years 9 months ago
2004
Springer
— Time sharing between all the users of a Grid is a major issue in cluster and Grid integration. Classical Grid architecture involves a higher level scheduler which submits non o...
130
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ASPLOS
2010
ACM
15 years 11 months ago
2010
ACM
To make efficient use of CMPs with tens to hundreds of cores, it is often necessary to exploit fine-grain parallelism. However, managing tasks of a few thousand instructions is ...
132
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INFOCOM
2003
IEEE
15 years 9 months ago
2003
IEEE
— Input-queued switches are used extensively in the design of high-speed routers. As switch speeds and sizes increase, the design of the switch scheduler becomes a primary challe...
113
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ISPASS
2007
IEEE
15 years 10 months ago
2007
IEEE
—Although SIMD extensions are a cost effective way to exploit the data level parallelism present in most media applications, we will show that they had have a very limited memory...
130
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PPAM
2005
Springer
15 years 10 months ago
2005
Springer
This paper describes a checkpointing mechanism destined for Distributed Shared Memory (DSM) systems with speculative prefetching. Speculation is a general technique involving predi...