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ARC
2006
Springer
124views Hardware» more  ARC 2006»
15 years 8 months ago
A Flexible Multi-port Caching Scheme for Reconfigurable Platforms
Abstract. Memory accesses contribute sunstantially to aggregate system delays. It is critical for designers to ensure that the memory subsystem is designed efficiently, and much wo...
Su-Shin Ang, George A. Constantinides, Peter Y. K....
PVLDB
2010
147views more  PVLDB 2010»
15 years 2 months ago
HYRISE - A Main Memory Hybrid Storage Engine
In this paper, we describe a main memory hybrid database system called HYRISE, which automatically partitions tables into vertical partitions of varying widths depending on how th...
Martin Grund, Jens Krüger, Hasso Plattner, Al...
ICPP
2000
IEEE
15 years 8 months ago
Runtime Parallel Incremental Scheduling of DAGs
A runtime parallel incremental DAG scheduling approach is described in this paper. A DAG is expanded incrementally, scheduled, and executed on a parallel machine. A DAG scheduling...
Min-You Wu, Wei Shu, Yong Chen
ASPDAC
2007
ACM
102views Hardware» more  ASPDAC 2007»
15 years 8 months ago
Clock Skew Scheduling with Delay Padding for Prescribed Skew Domains
Clock skew scheduling is a technique that intentionally introduces skews to memory elements to improve the performance of a sequential circuit. It was shown in [21] that the full ...
Chuan Lin, Hai Zhou
ECRTS
2004
IEEE
15 years 8 months ago
Multiprocessor Energy-Efficient Scheduling with Task Migration Considerations
This paper targets energy-efficient scheduling of tasks over multiple processors, where tasks share a common deadline. Distinct from many research results on heuristics-based ener...
Jian-Jia Chen, Heng-Ruey Hsu, Kai-Hsiang Chuang, C...