3202 search results - page 125 / 641 » Memory access scheduling |
152
Voted
IPPS
2002
IEEE
15 years 9 months ago
2002
IEEE
The increasing gap between processor and memory performance has led to new architectural models for memory-intensive applications. In this paper, we use a set of memory-intensive ...
135
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SPDP
1991
IEEE
15 years 8 months ago
1991
IEEE
A number of experiments regarding the placement of instructions, private data and shared data in the Non-Uniform-Memory-Access multiprocessor, RP3 has been performed. Three Scient...
215
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TCAD
1998
15 years 4 months ago
1998
This paper presents techniques for generating addresses for memories containing multiple arrays. Because these techniques rely on the inversion or rearrangement of address bits, t...
143
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ICCAD
2003
IEEE
16 years 1 months ago
2003
IEEE
— Memory-intensive applications present unique challenges to an ASIC designer in terms of the choice of memory organization, memory size requirements, bandwidth and access latenc...
170
Voted
ICPP
1999
IEEE
15 years 8 months ago
1999
IEEE
The probability of failures in software distributed shared memory (SDSM) increases as the system size grows. This paper introduces a new, efficient message logging technique, call...