3202 search results - page 130 / 641 » Memory access scheduling |
140
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ISCA
1997
IEEE
15 years 8 months ago
1997
IEEE
Improvements in main memory speeds have not kept pace with increasing processor clock frequency and improved exploitation of instruction-level parallelism. Consequently, the gap b...
150
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EUROPAR
2005
Springer
15 years 10 months ago
2005
Springer
There are two important hurdles that restrict the scalability of directory-based shared-memory multiprocessors: the directory memory overhead and the long L2 miss latencies due to ...
158
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JPDC
2010
15 years 3 months ago
2010
Non-uniform memory architectures with cache coherence (ccNUMA) are becoming increasingly common, not just for large-scale high performance platforms but also in the context of mul...
126
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IWANN
1999
Springer
15 years 8 months ago
1999
Springer
This paper presents results from lesion experiments on a modular attractor neural network model of semantic access. Real picture data forms the basis of perceptual input to the mod...
143
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DAC
2002
ACM
16 years 5 months ago
2002
ACM
In this paper, we present a compiler strategy to optimize data accesses in regular array-intensive applications running on embedded multiprocessor environments. Specifically, we p...