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CATA
2009
15 years 5 months ago
Built-in Self-Test for Memory Resources in Virtex-4 Field Programmable Gate Arrays
ABSTRACT: We present a Built-In Self-Test (BIST) approach for programmable embedded memories in Xilinx Virtex-4 Field Programmable Gate Arrays (FPGAs). The target resources are the...
Brooks R. Garrison, Daniel T. Milton, Charles E. S...
JUCS
2000
120views more  JUCS 2000»
15 years 4 months ago
Compiler Generated Multithreading to Alleviate Memory Latency
: Since the era of vector and pipelined computing, the computational speed is limited by the memory access time. Faster caches and more cache levels are used to bridge the growing ...
Kristof Beyls, Erik H. D'Hollander
211
Voted
COMSUR
2011
264views Hardware» more  COMSUR 2011»
14 years 4 months ago
Low-Memory Wavelet Transforms for Wireless Sensor Networks: A Tutorial
Abstract—The computational and memory resources of wireless sensor nodes are typically very limited, as the employed low-energy microcontrollers provide only hardware support for...
Stephan Rein, Martin Reisslein
ADBIS
1998
Springer
180views Database» more  ADBIS 1998»
15 years 8 months ago
Designing Persistence for Real-Time Distributed Object Systems
An implementation of persistent object store for real-time systems with strict processing time constraints is a challenging task, because many traditional database techniques, e.g....
Igor Nekrestyanov, Boris Novikov, Ekaterina Pavlov...
DATE
2002
IEEE
123views Hardware» more  DATE 2002»
15 years 9 months ago
False Path Elimination in Quasi-Static Scheduling
We have developed a technique to compute a Quasi Static Schedule of a concurrent specification for the software partition of an embedded system. Previous work did not take into a...
G. Arrigoni, L. Duchini, Claudio Passerone, Lucian...