This paper presents an algorithm to automatically map code on a generic intelligent memory system that consists of a host processor and a simpler memory processor. To achieve high...
Exploitation ofinstruction-levelparallelism is an ejfective mechanism for improving the performance of modern super-scalar/VLIW processors. Various software techniques can be appl...
- This paper presents encoding techniques to optimize the switching activity on a multiplexed DRAM address bus. The DRAM switching activity can be classified either as external (be...
In a free of charge or flat-rate Internet access environment, there often exists abusive and unfair usage of network resources. In this paper, the Internet access by the dormitory...
Tsung-Ching Lin, Yeali S. Sun, Shi-Chung Chang, Sh...
Abstract—We consider the problem of jointly optimizing random access and subgraph selection in coded wireless packet networks. As opposed to the corresponding scheduling approach...
Maximilian Riemensberger, Michael Heindlmaier, And...