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2007
IEEE
15 years 11 months ago
Performance analysis of a user-level memory server
Abstract—Large-scale parallel applications often produce immense quantities of data that need to be analyzed. To avoid performing repeated, costly disk accesses, analysis of larg...
Scott Pakin, Greg Johnson
134
Voted
DATE
2005
IEEE
116views Hardware» more  DATE 2005»
15 years 10 months ago
FORAY-GEN: Automatic Generation of Affine Functions for Memory Optimizations
In today’s embedded applications a significant portion of energy is spent in the memory subsystem. Several approaches have been proposed to minimize this energy, including the u...
Ilya Issenin, Nikil D. Dutt
IPPS
2005
IEEE
15 years 10 months ago
A Cost-Effective Main Memory Organization for Future Servers
Today, the amount of main memory in mid-range servers is pushing practical limits with as much as 192 GB memory in a 24 processor system [21]. Further, with the onset of multi-thr...
Magnus Ekman, Per Stenström
152
Voted
DATE
2003
IEEE
141views Hardware» more  DATE 2003»
15 years 10 months ago
On-chip Stack Based Memory Organization for Low Power Embedded Architectures
This paper presents a on-chip stack based memory organization that effectively reduces the energy dissipation in programmable embedded system architectures. Most embedded systems ...
Mahesh Mamidipaka, Nikil D. Dutt
127
Voted
ASPLOS
1996
ACM
15 years 9 months ago
Reducing Network Latency Using Subpages in a Global Memory Environment
New high-speed networks greatly encourage the use of network memory as a cache for virtual memory and file pages, thereby reducing the need for disk access. Becausepages are the f...
Hervé A. Jamrozik, Michael J. Feeley, Geoff...