Sciweavers

3202 search results - page 189 / 641
» Memory access scheduling
Sort
View
WINET
2002
98views more  WINET 2002»
15 years 4 months ago
A Unified Architecture for the Design and Evaluation of Wireless Fair Queueing Algorithms
Abstract. Fair queueing in the wireless domain poses significant challenges due to unique issues in the wireless channel such as locationdependent and bursty channel errors. In thi...
Thyagarajan Nandagopal, Songwu Lu, Vaduvur Bhargha...
USENIX
2008
15 years 7 months ago
LeakSurvivor: Towards Safely Tolerating Memory Leaks for Garbage-Collected Languages
Continuous memory leaks severely hurt program performance and software availability for garbage-collected programs. This paper presents a safe method, called LeakSurvivor, to tole...
Yan Tang, Qi Gao, Feng Qin
WMPI
2004
ACM
15 years 10 months ago
SCIMA-SMP: on-chip memory processor architecture for SMP
Abstract. In this paper, we propose a processor architecture with programmable on-chip memory for a high-performance SMP (symmetric multi-processor) node named SCIMA-SMP (Software ...
Chikafumi Takahashi, Masaaki Kondo, Taisuke Boku, ...
137
Voted
CODES
2009
IEEE
15 years 9 months ago
Cycle count accurate memory modeling in system level design
In this paper, we propose an effective automatic generation approach for a Cycle-Count Accurate Memory Model (CCAMM) from the Clocked Finite State Machine (CFSM) of the Cycle Accu...
Yi-Len Lo, Mao Lin Li, Ren-Song Tsay
SIGMETRICS
2011
ACM
198views Hardware» more  SIGMETRICS 2011»
15 years 1 days ago
Memory Trace Compression and Replay for SPMD Systems using Extended PRSDs?
Concurrency levels in large-scale supercomputers are rising exponentially, and shared-memory nodes with hundreds of cores and non-uniform memory access latencies are expected with...
Sandeep Budanur, Frank Mueller, Todd Gamblin