Sciweavers

3202 search results - page 200 / 641
» Memory access scheduling
Sort
View
PATMOS
2005
Springer
15 years 11 months ago
Improving the Memory Bandwidth Utilization Using Loop Transformations
Abstract. Embedded devices designed for various real-time multimedia and telecom applications, have a bottleneck in energy consumption and performance that becomes day by day more ...
Minas Dasygenis, Erik Brockmeyer, Francky Catthoor...
DATE
2000
IEEE
101views Hardware» more  DATE 2000»
15 years 10 months ago
Memory Arbitration and Cache Management in Stream-Based Systems
With the ongoing advancements in VLSI technology, the performance of an embedded system is determined to a large extend by the communication of data and instructions. This results...
Françoise Harmsze, Adwin H. Timmer, Jef L. ...
CC
2009
Springer
132views System Software» more  CC 2009»
16 years 6 months ago
Implementation and Use of Transactional Memory with Dynamic Separation
Abstract. We introduce the design and implementation of dynamic separation (DS) as a programming discipline for using transactional memory. Our approach is based on the programmer ...
Andrew Birrell, Johnson Hsieh, Martín Abadi...
IPPS
2009
IEEE
16 years 21 days ago
Early experiences on accelerating Dijkstra's algorithm using transactional memory
In this paper we use Dijkstra’s algorithm as a challenging, hard to parallelize paradigm to test the efficacy of several parallelization techniques in a multicore architecture....
Nikos Anastopoulos, Konstantinos Nikas, Georgios I...
VTS
1999
IEEE
83views Hardware» more  VTS 1999»
15 years 10 months ago
PADded Cache: A New Fault-Tolerance Technique for Cache Memories
This paper presents a new fault-tolerance technique for cache memories. Current fault-tolerance techniques for caches are limited either by the number of faults that can be tolera...
Philip P. Shirvani, Edward J. McCluskey