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ISCA
2006
IEEE
123views Hardware» more  ISCA 2006»
16 years 7 days ago
Improving Cost, Performance, and Security of Memory Encryption and Authentication
Protection from hardware attacks such as snoopers and mod chips has been receiving increasing attention in computer architecture. This paper presents a new combined memory encrypt...
Chenyu Yan, Daniel Englender, Milos Prvulovic, Bri...
MICRO
2006
IEEE
89views Hardware» more  MICRO 2006»
16 years 7 days ago
DMDC: Delayed Memory Dependence Checking through Age-Based Filtering
One of the main challenges of modern processor design is the implementation of a scalable and efficient mechanism to detect memory access order violations as a result of out-of-o...
Fernando Castro, Luis Piñuel, Daniel Chaver...
HIPEAC
2005
Springer
15 years 11 months ago
Memory-Centric Security Architecture
Abstract. This paper presents a new security architecture for protecting software confidentiality and integrity. Different from the previous process-centric systems designed for ...
Weidong Shi, Chenghuai Lu, Hsien-Hsin S. Lee
SP
2003
IEEE
15 years 11 months ago
Using Memory Errors to Attack a Virtual Machine
We present an experimental study showing that soft memory errors can lead to serious security vulnerabilities in Java and .NET virtual machines, or in any system that relies on ty...
Sudhakar Govindavajhala, Andrew W. Appel
DATE
2010
IEEE
158views Hardware» more  DATE 2010»
15 years 11 months ago
Energy- and endurance-aware design of phase change memory caches
—Phase change memory (PCM) is one of the most promising technology among emerging non-volatile random access memory technologies. Implementing a cache memory using PCM provides m...
Yongsoo Joo, Dimin Niu, Xiangyu Dong, Guangyu Sun,...