3202 search results - page 37 / 641 » Memory access scheduling |
VTC
2006
IEEE
15 years 7 months ago
2006
IEEE
— In High Speed Downlink Packet Access (HSDPA), Packet Scheduler is a key element for high-speed and efficient transmissions. In this paper, we propose an enhanced packet schedu...
122
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ASPDAC
2008
ACM
15 years 3 months ago
2008
ACM
On chip memories provide fast and energy efficient storage for code and data in comparison to caches or external memories. We present techniques and algorithms that allow for an au...
97
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ICPADS
1998
IEEE
15 years 5 months ago
1998
IEEE
: Three fast mutual exclusion algorithms using read-modify-write and atomic read/write registers are presented in a sequence, with an improvement from one to the next. The last alg...
114
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ICPADS
2006
IEEE
15 years 7 months ago
2006
IEEE
The widening gap between processor and memory performance is the main bottleneck for modern computer systems to achieve high processor utilization. In this paper, we propose a new...
114
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INFOCOM
2007
IEEE
15 years 8 months ago
2007
IEEE
—We consider the problem of uplink/downlink scheduling in a multichannel wireless access point network where channel states differ across channels as well as users, vary with tim...