Sciweavers

3202 search results - page 57 / 641
» Memory access scheduling
Sort
View
ARCS
2008
Springer
15 years 6 months ago
Self-aware Memory: Managing Distributed Memory in an Autonomous Multi-master Environment
Abstract. A major problem considering parallel computing is maintaining memory consistency and coherency, and ensuring ownership and access rights. These problems mainly arise from...
Rainer Buchty, Oliver Mattes, Wolfgang Karl
ISCAS
2003
IEEE
78views Hardware» more  ISCAS 2003»
15 years 9 months ago
History-based memory mode prediction for improving memory performance
To increase the bandwidth of synchronous memories that are widely adopted for high performance memory systems, a predictive mode control scheme is proposed to reduce memory latenc...
Seong-Il Park, In-Cheol Park
CORR
2006
Springer
112views Education» more  CORR 2006»
15 years 4 months ago
High-level synthesis under I/O Timing and Memory constraints
The design of complex Systems-on-Chips implies to take into account communication and memory access constraints for the integration of dedicated hardware accelerator. In this paper...
Philippe Coussy, Gwenolé Corre, Pierre Bome...
HPCA
1999
IEEE
15 years 8 months ago
WildFire: A Scalable Path for SMPs
Researchers have searched for scalable alternatives to the symmetric multiprocessor (SMP) architecture since it was first introduced in 1982. This paper introduces an alternative ...
Erik Hagersten, Michael Koster
VLSISP
2008
147views more  VLSISP 2008»
15 years 2 months ago
Data Reuse Exploration for Low Power Motion Estimation Architecture Design in H.264 Encoder
Data access usually leads to more than 50% of the power cost in a modern signal processing system. To realize a low-power design, how to reduce the memory access power is a critica...
Yu-Han Chen, Tung-Chien Chen, Chuan-Yung Tsai, Sun...