3202 search results - page 64 / 641 » Memory access scheduling |
126
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MSN
2007
Springer
15 years 10 months ago
2007
Springer
The access scheduling on the control channels in TDMA wireless mesh networks is studied in this paper. The problem is to assign time-slots for each node in the network to access th...
139
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DATE
2004
IEEE
15 years 7 months ago
2004
IEEE
Many high-end DSP processors employ both multiple memory banks and heterogeneous register files to improve performance and power consumption. The complexity of such architectures ...
145
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SSS
2010
Springer
15 years 2 months ago
2010
Springer
We present a distributed transactional memory (TM) scheduler called Bi-interval that optimizes the execution order of transactional operations to minimize conflicts. Bi-interval c...
138
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PDP
2005
IEEE
15 years 9 months ago
2005
IEEE
In this paper, we consider the problem of allocating and scheduling a collection of independent, equal-sized tasks on heterogeneous star-shaped platforms. We also address the same...
142
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IPPS
1998
IEEE
15 years 8 months ago
1998
IEEE
In the study of PetaFlop project, Processor-In-Memory array was proposed to be a target architecture in achieving 1015 floating point operations per second computing performance. ...