This paper shows that the speed of FPGAs with large embedded memory arrays can be improved by adding direct programmable connections between the memories. Nets that connect to mul...
Steven J. E. Wilton, Jonathan Rose, Zvonko G. Vran...
One major issue in designing image processors is to design a memory system that supports parallel access with a simple interconnection network. This paper presents a design method...
Predicting timing behavior is key to efficient embedded real-time system design and verification. Especially memory accesses and co-processor calls over shared communication net...
In this paper, we introduce a profile-driven online page migration scheme and investigate its impact on the performance of multithreaded applications. We use lightweight, inexpens...
We review a recently introduced computation model for streaming and external memory data. An important feature of this model is that it distinguishes between sequentially reading (...