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FPGA
1997
ACM
168views FPGA» more  FPGA 1997»
15 years 8 months ago
Memory-to-Memory Connection Structures in FPGAs with Embedded Memory Arrays
This paper shows that the speed of FPGAs with large embedded memory arrays can be improved by adding direct programmable connections between the memories. Nets that connect to mul...
Steven J. E. Wilton, Jonathan Rose, Zvonko G. Vran...
ISVLSI
2006
IEEE
82views VLSI» more  ISVLSI 2006»
15 years 10 months ago
Optimal Periodical Memory Allocation for Logic-in-Memory Image Processors
One major issue in designing image processors is to design a memory system that supports parallel access with a simple interconnection network. This paper presents a design method...
Masanori Hariyama, Michitaka Kameyama, Yasuhiro Ko...
CODES
2006
IEEE
15 years 10 months ago
Integrated analysis of communicating tasks in MPSoCs
Predicting timing behavior is key to efficient embedded real-time system design and verification. Especially memory accesses and co-processor calls over shared communication net...
Simon Schliecker, Matthias Ivers, Rolf Ernst
SC
2004
ACM
15 years 9 months ago
Using Hardware Counters to Automatically Improve Memory Performance
In this paper, we introduce a profile-driven online page migration scheme and investigate its impact on the performance of multithreaded applications. We use lightweight, inexpens...
Mustafa M. Tikir, Jeffrey K. Hollingsworth
FCT
2005
Springer
15 years 9 months ago
The Complexity of Querying External Memory and Streaming Data
We review a recently introduced computation model for streaming and external memory data. An important feature of this model is that it distinguishes between sequentially reading (...
Martin Grohe, Christoph Koch, Nicole Schweikardt