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IPPS
2003
IEEE
15 years 7 months ago
Global Communication Optimization for Tensor Contraction Expressions under Memory Constraints
The accurate modeling of the electronic structure of atoms and molecules involves computationally intensive tensor contractions involving large multi-dimensional arrays. The effi...
Daniel Cociorva, Xiaoyang Gao, Sandhya Krishnan, G...
IEEEPACT
2002
IEEE
15 years 6 months ago
A Framework for Parallelizing Load/Stores on Embedded Processors
Many modern embedded processors (esp. DSPs) support partitioned memory banks (also called X-Y memory or dual bank memory) along with parallel load/store instructions to achieve co...
Xiaotong Zhuang, Santosh Pande, John S. Greenland ...
DATE
2005
IEEE
171views Hardware» more  DATE 2005»
15 years 7 months ago
Access Pattern-Based Code Compression for Memory-Constrained Embedded Systems
As compared to a large spectrum of performance optimizations, relatively little effort has been dedicated to optimize other aspects of embedded applications such as memory space r...
Ozcan Ozturk, Hendra Saputra, Mahmut T. Kandemir, ...
156
Voted
DLS
2009
182views Languages» more  DLS 2009»
14 years 11 months ago
Context-oriented software transactional memory in common lisp
Software transactional memory (STM) is a promising approach for coordinating concurrent threads, for which many implementation strategies are currently being researched. Although ...
Pascal Costanza, Charlotte Herzeel, Theo D'Hondt
100
Voted
VLSID
2002
IEEE
142views VLSI» more  VLSID 2002»
16 years 2 months ago
Architecture and Design of a High Performance SRAM for SOC Design
Critical issues in designing a high speed, low power static RAM in deep submicron technologies are described along with the design techniques used to overcome them. With appropria...
Shobha Singh, Shamsi Azmi, Nutan Aarawal, Penaka P...