354 search results - page 13 / 71 » Memory and compiler optimizations for low-power and -energy |
96
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CONCURRENCY
2000
14 years 10 months ago
2000
The Java memory model described in Chapter 17 of the Java Language Specification gives constraints on how threads interact through memory. This chapter is hard to interpret and po...
ASPLOS
2004
ACM
15 years 3 months ago
2004
ACM
This paper introduces a compiler-orchestrated prefetching system as a unified framework geared toward ameliorating the gap between processing speeds and memory access latencies. ...
CGO
2009
IEEE
15 years 5 months ago
2009
IEEE
—Most research into high-performance software transactional memory (STM) assumes that transactions will run on a processor with a relatively strict memory model, such as Total St...
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ASPLOS
1994
ACM
15 years 2 months ago
1994
ACM
In the past decade, processor speed has become significantly faster than memory speed. Small, fast cache memories are designed to overcome this discrepancy, but they are only effe...
ICCS
2005
Springer
15 years 3 months ago
2005
Springer
Cray X1 Fortran and C/C++ compilers provide a number of loop transformations, notably vectorization and multistreaming, in order to exploit the multistreaming processor (MSP) hard...