354 search results - page 21 / 71 » Memory and compiler optimizations for low-power and -energy |
IPPS
2005
IEEE
15 years 3 months ago
2005
IEEE
This paper presents the design and the implementation of a compiler and runtime infrastructure for automatic program distribution. We are building a research infrastructure that e...
88
Voted
IEEEPACT
2002
IEEE
15 years 3 months ago
2002
IEEE
In this paper, we describe an algorithm and implementation of locality optimizations for architectures with instruction sets such as Intel’s SSE and Motorola’s AltiVec that su...
127
Voted
HPCA
2011
IEEE
14 years 1 months ago
2011
IEEE
Flash memory based solid state drives (SSDs) have shown a great potential to change storage infrastructure fundamentally through their high performance and low power. Most recent ...
110
Voted
IEEEPACT
2009
IEEE
14 years 8 months ago
2009
IEEE
As the gap between processor and memory continues to grow, memory performance becomes a key performance bottleneck for many applications. Compilers therefore increasingly seek to m...
102
Voted
LCR
1998
Springer
15 years 2 months ago
1998
Springer
Because irregular applications have unpredictable memory access patterns, their performance is dominated by memory behavior. The Impulse con gurable memory controller will enable s...