354 search results - page 4 / 71 » Memory and compiler optimizations for low-power and -energy |
DATE
2003
IEEE
15 years 3 months ago
2003
IEEE
Instruction reuse is a microarchitectural technique that improves the execution time of a program by removing redundant computations at run-time. Although this is the job of an op...
MICRO
2002
IEEE
15 years 3 months ago
2002
IEEE
Multimedia processing on embedded devices requires an architecture that leads to high performance, low power consumption, reduced design complexity, and small code size. In this p...
VLSID
2007
IEEE
15 years 10 months ago
2007
IEEE
The Discrete Wavelet Transform (DWT) forms the core of the JPEG2000 image compression algorithm. Since the JPEG2000 compression application is heavily data-intensive, the overall ...
IEEEPACT
2000
IEEE
15 years 2 months ago
2000
IEEE
Region-based compilation repartitions a program into more desirable compilation units for optimization and scheduling, particularly beneficial for ILP architectures. With region-...
ISQED
2007
IEEE
15 years 4 months ago
2007
IEEE
Straining of silicon improves mobility of carriers resulting in speed enhancement for transistors in CMOS technology. Traditionally, silicon straining is applied in a similar ad-h...