354 search results - page 50 / 71 » Memory and compiler optimizations for low-power and -energy |
102
Voted
DAC
2010
ACM
14 years 10 months ago
2010
ACM
The performance of most embedded systems is critically dependent on the average memory access latency. Improving the cache hit rate can have significant positive impact on the per...
75
Voted
DAC
2004
ACM
15 years 11 months ago
2004
ACM
Scratch-pad memories (SPMs) enable fast access to time-critical data. While prior research studied both static and dynamic SPM management strategies, not being able to keep all ho...
108
Voted
DAC
2003
ACM
15 years 11 months ago
2003
ACM
This paper considers the role of performance and area estimates from behavioral synthesis in design space exploration. We have developed a compilation system that automatically ma...
104
Voted
TLDI
2010
ACM
15 years 7 months ago
2010
ACM
We present the design of a formal low-level multi-threaded language with advanced region-based memory management and synchronization primitives, where well-typed programs are memo...
86
Voted
IPPS
2008
IEEE
15 years 4 months ago
2008
IEEE
—The performance bottleneck for many scientific applications is the cost of memory access inside linear algebra kernels. Tuning such kernels for memory efficiency is a complex ...