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» Memory and compiler optimizations for low-power and -energy
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74
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CASES
2003
ACM
15 years 1 months ago
Efficient spill code for SDRAM
Processors such as StrongARM and memory such as SDRAM enable efficient execution of multiple loads and stores in a single instruction. This is particularly useful in connection wi...
V. Krishna Nandivada, Jens Palsberg
SPAA
1993
ACM
15 years 2 months ago
Supporting Sets of Arbitrary Connections on iWarp Through Communication Context Switches
In this paper we introduce the ConSet communication model for distributed memory parallel computers. The communication needs of an application program can be satisfied by some ar...
Anja Feldmann, Thomas Stricker, Thomas E. Warfel
186
Voted
POPL
2007
ACM
15 years 10 months ago
Locality approximation using time
Reuse distance (i.e. LRU stack distance) precisely characterizes program locality and has been a basic tool for memory system research since the 1970s. However, the high cost of m...
Xipeng Shen, Jonathan Shaw, Brian Meeker, Chen Din...
86
Voted
LCTRTS
2007
Springer
15 years 4 months ago
Tetris: a new register pressure control technique for VLIW processors
The run-time performance of VLIW (very long instruction word) microprocessors depends heavily on the effectiveness of its associated optimizing compiler. Typical VLIW compiler pha...
Weifeng Xu, Russell Tessier
83
Voted
BMCBI
2006
116views more  BMCBI 2006»
14 years 10 months ago
HotSwap for bioinformatics: A STRAP tutorial
Background: Bioinformatics applications are now routinely used to analyze large amounts of data. Application development often requires many cycles of optimization, compiling, and...
Christoph Gille, Peter N. Robinson