Sciweavers

354 search results - page 59 / 71
» Memory and compiler optimizations for low-power and -energy
Sort
View
ICS
1999
Tsinghua U.
15 years 2 months ago
Software trace cache
—This paper explores the use of compiler optimizations which optimize the layout of instructions in memory. The target is to enable the code to make better use of the underlying ...
Alex Ramírez, Josep-Lluis Larriba-Pey, Carl...
109
Voted
CASES
2008
ACM
15 years 4 days ago
Efficient vectorization of SIMD programs with non-aligned and irregular data access hardware
Automatic vectorization of programs for partitioned-ALU SIMD (Single Instruction Multiple Data) processors has been difficult because of not only data dependency issues but also n...
Hoseok Chang, Wonyong Sung
TJS
2002
135views more  TJS 2002»
14 years 9 months ago
HPCVIEW: A Tool for Top-down Analysis of Node Performance
Although it is increasingly difficult for large scientific programs to attain a significant fraction of peak performance on systems based on microprocessors with substantial instr...
John M. Mellor-Crummey, Robert J. Fowler, Gabriel ...
IEEEPACT
2009
IEEE
15 years 4 months ago
Automatic Tuning of Discrete Fourier Transforms Driven by Analytical Modeling
—Analytical models have been used to estimate optimal values for parameters such as tile sizes in the context of loop nests. However, important algorithms such as fast Fourier tr...
Basilio B. Fraguela, Yevgen Voronenko, Markus P&uu...
86
Voted
CC
2007
Springer
109views System Software» more  CC 2007»
15 years 4 months ago
Layout Transformations for Heap Objects Using Static Access Patterns
As the amount of data used by programs increases due to the growth of hardware storage capacity and computing power, efficient memory usage becomes a key factor for performance. Si...
Jinseong Jeon, Keoncheol Shin, Hwansoo Han