254 search results - page 26 / 51 » Memory copies in multi-level memory systems |
ISCA
2009
IEEE
15 years 4 months ago
2009
IEEE
As transistor density continues to grow at an exponential rate in accordance to Moore’s law, the goal for many Chip Multi-Processor (CMP) systems is to scale the number of on-ch...
OOPSLA
2005
Springer
15 years 3 months ago
2005
Springer
It is now well established that the device scaling predicted by Moore’s Law is no longer a viable option for increasing the clock frequency of future uniprocessor systems at the...
115
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FPGA
2010
ACM
14 years 10 months ago
2010
ACM
We use reconfigurable hardware to construct a high throughput Bayesian computing machine (BCM) capable of evaluating probabilistic networks with arbitrary DAG (directed acyclic gr...
100
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PCRCW
1997
Springer
15 years 1 months ago
1997
Springer
In recent years, theChaos Project at theUniversityofWashingtonhas analyzed and simulated a dozen routing algorithms. Three new routing algorithms have been invented; of these, the...
FPGA
2007
ACM
15 years 3 months ago
2007
ACM
Shrinking time-to-market and high demand for productivity has driven traditional hardware designers to use design methodologies that start from high-level languages. However, meet...