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» Memory modeling for system synthesis
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IPPS
1996
IEEE
15 years 10 months ago
Software Support for Virtual Memory-Mapped Communication
Virtual memory-mapped communication (VMMC) is a communication model providing direct data transfer between the sender's and receiver's virtual address spaces. This model...
Cezary Dubnicki, Liviu Iftode, Edward W. Felten, K...
COGSR
2011
99views more  COGSR 2011»
15 years 23 days ago
A biologically realistic cleanup memory: Autoassociation in spiking neurons
Methods for cleaning up (or recognizing) states of a neural network are crucial for the functioning of many neural cognitive models. For example, Vector Symbolic Architectures pro...
Terrence C. Stewart, Yichuan Tang, Chris Eliasmith
GPCE
2008
Springer
15 years 6 months ago
Property models: from incidental algorithms to reusable components
A user interface, such as a dialog, assists a user in synthesising a set of values, typically parameters for a command object. Code for “command parameter synthesis” is usuall...
Jaakko Järvi, Mat Marcus, Sean Parent, John F...
POPL
2007
ACM
16 years 6 months ago
Geometry of synthesis: a structured approach to VLSI design
We propose a new technique for hardware synthesis from higherorder functional languages with imperative features based on Reynolds's Syntactic Control of Interference. The re...
Dan R. Ghica
ASPDAC
2005
ACM
132views Hardware» more  ASPDAC 2005»
15 years 7 months ago
Automatic synthesis and scheduling of multirate DSP algorithms
- To date, most high-level synthesis systems do not automatically solve present design problems, such as those related to timing associated with the physical implementation of mult...
Ying Yi, Mark Milward, Sami Khawam, Ioannis Nousia...