1992 search results - page 118 / 399 » Memory modeling for system synthesis |
155
click to vote
FSTTCS
2007
Springer
15 years 12 months ago
2007
Springer
We examine a bidirectional Propositional Dynamic Logic (PDL) for message sequence charts (MSCs) extending LTL and TLC− . Every formula is translated into an equivalent communicat...
197
click to vote
SCOPES
2004
Springer
15 years 11 months ago
2004
Springer
Abstract. Synthesis of digital signal processing (DSP) software from dataflow-based formal models is an effective approach for tackling the complexity of modern DSP applications. I...
153
click to vote
EUROSYS
2008
ACM
16 years 2 months ago
2008
ACM
Programs written in type-unsafe languages such as C and C++ incur costly memory errors that result in corrupted data structures, program crashes, and incorrect results. We present...
162
Voted
APSEC
2008
IEEE
16 years 9 days ago
2008
IEEE
Memory usage analysis is an important problem for resource-constrained mobile devices, especially under mission- or safety-critical circumstances. Program codes running on or bein...
156
click to vote
SAC
2006
ACM
15 years 11 months ago
2006
ACM
In this paper, we present an efficient procedure for building a piecewise linear function approximation of the speed function of a processor with hierarchical memory structure. Th...