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» Memory modeling for system synthesis
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ASPDAC
2009
ACM
111views Hardware» more  ASPDAC 2009»
16 years 13 days ago
A UML-based approach for heterogeneous IP integration
- With increasing availability of predefined IP (Intellectual Properties) blocks and inexpensive microprocessors, embedded system designers are faced with more design choices than ...
Zhenxin Sun, Weng-Fai Wong
CODES
2005
IEEE
15 years 11 months ago
Memory access optimizations in instruction-set simulators
Design of programmable processors and embedded applications requires instruction-set simulators for early exploration and validation of candidate architectures. Interpretive simul...
Mehrdad Reshadi, Prabhat Mishra
SODA
2004
ACM
83views Algorithms» more  SODA 2004»
15 years 7 months ago
Caching queues in memory buffers
Motivated by the need for maintaining multiple, large queues of data in modern high-performance systems, we study the problem of caching queues in memory under the following simpl...
Rajeev Motwani, Dilys Thomas
ECOOP
2010
Springer
15 years 10 months ago
Reasoning about the Implementation of Concurrency Abstractions on x86-TSO
ncy Abstractions on x86-TSO Scott Owens University of Cambridge Abstract. With the rise of multi-core processors, shared-memory concurrency has become a widespread feature of compu...
Scott Owens
ECTEL
2006
Springer
15 years 9 months ago
An Exploratory Study of the Relationship Between Learning Styles and Cognitive Traits
To provide personalization and adaptivity in technology enhanced learning systems, the needs of learners have to be known by the system first. Detecting these needs is a challengin...
Sabine Graf, Taiyu Lin, Lynn Jeffrey, Kinshuk