1992 search results - page 138 / 399 » Memory modeling for system synthesis |
132
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SAMOS
2004
Springer
15 years 11 months ago
2004
Springer
This paper presents a novel micro-architecture for high-performance and low-power DSPs. The underlying Synchronous Transfer Architecture (STA) fills the gap between SIMD-DSPs and ...
143
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DATE
2009
IEEE
16 years 21 days ago
2009
IEEE
Abstract—Convergence of communication, consumer applications and computing within mobile systems pushes memory requirements both in terms of size, bandwidth and power consumption...
164
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ASPLOS
2006
ACM
15 years 12 months ago
2006
ACM
Exploiting thread level parallelism is paramount in the multi-core era. Transactions enable programmers to expose such parallelism by greatly simplifying the multi-threaded progra...
147
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CASES
2006
ACM
15 years 12 months ago
2006
ACM
Memory size reduction and memory accesses optimization are crucial issues for embedded systems. In the context of affine programs, these two challenges are classically tackled by ...
152
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DATE
2008
IEEE
16 years 12 days ago
2008
IEEE
In this paper we propose an embedded software design flow, which starts from an UML model and provides automatic mapping to other models like Simulink or finite-state machines (FS...