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» Memory modeling for system synthesis
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IEEEHPCS
2010
15 years 3 months ago
Reducing memory requirements of stream programs by graph transformations
Stream languages explicitly describe fork-join parallelism and pipelines, offering a powerful programming model for many-core Multi-Processor Systems on Chip (MPSoC). In an embedd...
Pablo de Oliveira Castro, Stéphane Louise, ...
PLDI
2003
ACM
15 years 11 months ago
A practical flow-sensitive and context-sensitive C and C++ memory leak detector
This paper presents a static analysis tool that can automatically find memory leaks and deletions of dangling pointers in large C and C++ applications. We have developed a type s...
David L. Heine, Monica S. Lam
DASFAA
2011
IEEE
250views Database» more  DASFAA 2011»
14 years 9 months ago
An FTL-Agnostic Layer to Improve Random Write on Flash Memory
Flash memories are considered a competitive alternative to rotating disks as non-volatile data storage for database management systems. However, even if the Flash Translation Layer...
Brice Chardin, Olivier Pasteur, Jean-Marc Petit
AAAI
2000
15 years 7 months ago
The Systems Engineering Process Activities (SEPA) Methodology and Tool Suite
or cone, abstraction is chosen to represent a spectrum of user inputs/requirements that are narrowed, refined, and structured into a system design. User inputs require refinement f...
K. Suzanne Barber, Thomas J. Graser, Paul Grisham,...
ISCA
2007
IEEE
162views Hardware» more  ISCA 2007»
16 years 8 days ago
BulkSC: bulk enforcement of sequential consistency
While Sequential Consistency (SC) is the most intuitive memory consistency model and the one most programmers likely assume, current multiprocessors do not support it. Instead, th...
Luis Ceze, James Tuck, Pablo Montesinos, Josep Tor...