1992 search results - page 160 / 399 » Memory modeling for system synthesis |
172
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QEST
2007
IEEE
16 years 9 days ago
2007
IEEE
Previous studies have shown that buffering packets in DRAM is a performance bottleneck. In order to understand the impediments in accessing the DRAM, we developed a detailed Petri...
158
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IPPS
2010
IEEE
15 years 4 months ago
2010
IEEE
It is possible to implement the parallel random access machine (PRAM) on a chip multiprocessor (CMP) efficiently with an emulated shared memory (ESM) architecture to gain easy par...
144
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ICST
2008
IEEE
16 years 14 days ago
2008
IEEE
Testing remains a major challenge for model transformation development. Test models that are used as test data for model transformations, are constrained by various sources of kno...
146
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SSS
2010
Springer
15 years 4 months ago
2010
Springer
Abstract. Transformations from shared memory model to wireless sensor networks (WSNs) quickly become inefficient in the presence of prevalent message losses in WSNs, and this prohi...
168
Voted
SIGGRAPH
1993
ACM
15 years 10 months ago
1993
ACM
The realistic depiction of smoke, steam, mist and water reacting to a turbulent eld such as wind is an attractive and challenging problem. Its solution requires interlocking model...