1992 search results - page 16 / 399 » Memory modeling for system synthesis |
RSP
1999
IEEE
15 years 2 months ago
1999
IEEE
Though synchronous dataflow (SDF) graph has been a successful input specification language for digital signal processing (DSP) applications, lack of support for global states makes...
HYBRID
2003
Springer
15 years 3 months ago
2003
Springer
Abstract. The use of algorithmic verification and synthesis tools for hybrid systems is currently limited to systems exhibiting simple continuous dynamics such as timed automata o...
DSD
2002
IEEE
15 years 2 months ago
2002
IEEE
A configurable memory organisation for the execution of Hiperlan/2 transceiver baseband processing and MPEG2 decoding is presented. The configuration of the memory system is done ...
FPL
2010
Springer
14 years 7 months ago
2010
Springer
Transactional memory is a promising, optimistic synchronization mechanism for chip-multiprocessor systems. The simplicity of atomic sections, instead of using explicit locks, is al...
ICCAD
1997
IEEE
15 years 2 months ago
1997
IEEE
- Task preemption is a critical enabling mechanism in multi-task VLSI systems. On preemption, data in the register les must be preserved in order for the task to be resumed. This e...