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ISCA
1998
IEEE
125views Hardware» more  ISCA 1998»
15 years 4 months ago
Active Pages: A Computation Model for Intelligent Memory
Microprocessors and memory systems su er from a growing gap in performance. We introduce Active Pages, a computation model which addresses this gap by shifting data-intensive comp...
Mark Oskin, Frederic T. Chong, Timothy Sherwood
ACSD
2001
IEEE
91views Hardware» more  ACSD 2001»
15 years 3 months ago
Synthesis of Net Systems with Inhibitor Arcs from Step Transition Systems
We here consider transition systems of Elementary Net Systems with Inhibitor Arcs. There are basically two di erent types of non-interleaving semantics of such Petri nets, the a-po...
Marta Pietkiewicz-Koutny
ICCAD
1996
IEEE
119views Hardware» more  ICCAD 1996»
15 years 4 months ago
An algorithm for synthesis of system-level interface circuits
We describe an algorithm for the synthesis and optimization of interface circuits for embedded system components such as microprocessors, memory ASIC, and network subsystems with ...
Ki-Seok Chung, Rajesh K. Gupta, C. L. Liu
FSEN
2009
Springer
15 years 3 months ago
Verification, Performance Analysis and Controller Synthesis for Real-Time Systems
This note aims at providing a concise and precise Travellers Guide, Phrase Book or Reference Manual to the timed automata modeling formalism introduced by Alur and Dill [7, 8]. The...
Uli Fahrenberg, Kim G. Larsen, Claus R. Thrane