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» Memory modeling for system synthesis
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TACAS
2000
Springer
96views Algorithms» more  TACAS 2000»
15 years 3 months ago
On Memory-Block Traversal Problems in Model-Checking Timed-Systems
Fredrik Larsson, Paul Pettersson, Wang Yi
COMPSEC
2008
116views more  COMPSEC 2008»
14 years 12 months ago
Enforcing memory policy specifications in reconfigurable hardware
While general-purpose processor based systems are built to enforce memory protection to prevent the unintended sharing of data between processes, current systems built around reco...
Ted Huffmire, Timothy Sherwood, Ryan Kastner, Timo...
CMMR
2004
Springer
111views Music» more  CMMR 2004»
15 years 5 months ago
Aspects of the Topology of Interactions on Loop Dynamics in One and Two Dimensions
This paper discusses aspects of topology as relevant for loop dynamics as they occur in physical modeling synthesis algorithms. Boundary and interaction point behavior is treated p...
Georg Essl
ISSS
2002
IEEE
151views Hardware» more  ISSS 2002»
15 years 4 months ago
Tuning of Loop Cache Architectures to Programs in Embedded System Design
Adding a small loop cache to a microprocessor has been shown to reduce average instruction fetch energy for various sets of embedded system applications. With the advent of core-b...
Frank Vahid, Susan Cotterell