1992 search results - page 65 / 399 » Memory modeling for system synthesis |
107
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DSD
2010
IEEE
14 years 10 months ago
2010
IEEE
We present a high-level synthesis flow for mapping an algorithm description (in C) to a provably equivalent registertransfer level (RTL) description of hardware. This flow uses an ...
106
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NPL
2006
14 years 11 months ago
2006
In this paper we construct an associative memory model based on the restricted Coulomb energy (RCE) network. We propose a simple architecture and training algorithm for this RCE-b...
ICSEA
2006
IEEE
15 years 5 months ago
2006
IEEE
A modeling process is presented for extracting timingaccurate simulation models from complex embedded realtime systems. The process is supported by two complementary methods for t...
ICARCV
2008
IEEE
15 years 6 months ago
2008
IEEE
—This paper presents the controller synthesis for a fine actuation system of a 3-DOF micro parallel positioning platform. The platform is composed of a dual stage servo system fo...
103
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EUROSYS
2010
ACM
15 years 9 months ago
2010
ACM
Debugging real systems is hard, requires deep knowledge of the code, and is time-consuming. Bug reports rarely provide sufficient information, thus forcing developers to turn int...