Sciweavers

1992 search results - page 75 / 399
» Memory modeling for system synthesis
Sort
View
VLSID
2003
IEEE
147views VLSI» more  VLSID 2003»
16 years 1 months ago
SoC Synthesis with Automatic Hardware Software Interface Generation
Design of efficient System-on-Chips (SoCs) require thorough application analysis to identify various compute intensive parts. These compute intensive parts can be mapped to hardwa...
Amarjeet Singh 0002, Amit Chhabra, Anup Gangwar, B...
ICECCS
2007
IEEE
82views Hardware» more  ICECCS 2007»
15 years 7 months ago
Formalising Flash Memory: First Steps
We present first steps in the construction of formal models of NAND Flash memory, based on a recently emerged open standard for such devices. The model is at a level of abstracti...
Andrew Butterfield, Jim Woodcock
ICRA
1999
IEEE
133views Robotics» more  ICRA 1999»
15 years 5 months ago
Control of Flexible-Manufacturing Workcells Using Extended Moore Automata
The modeling and control flexible-manufacturing workcells (FMCs) has generally been performed in a hierarchical structure, where at the highest level they have been modeled as dis...
A. Ramírez, C. Sriskandarajah, Beno Benhabi...
IFIP
2010
Springer
14 years 8 months ago
Bounded Memory Dolev-Yao Adversaries in Collaborative Systems
Abstract. This paper extends existing models for collaborative systems. We investigate how much damage can be done by insiders alone, without collusion with an outside adversary. I...
Max I. Kanovich, Tajana Ban Kirigin, Vivek Nigam, ...
FMCAD
2008
Springer
15 years 3 months ago
Word-Level Sequential Memory Abstraction for Model Checking
el Sequential Memory Abstraction for Model Checking Per Bjesse Advanced Technology Group Synopsys Inc. Many designs intermingle large memories with wide data paths and nontrivial c...
Per Bjesse