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» Memory modeling for system synthesis
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CODES
2007
IEEE
15 years 4 months ago
Simultaneous synthesis of buses, data mapping and memory allocation for MPSoC
Heterogeneous multiprocessors are emerging as the dominant implementation approach to embedded multiprocessor systems. In addition to having processing elements suited to the targ...
Brett H. Meyer, Donald E. Thomas
DATE
2004
IEEE
152views Hardware» more  DATE 2004»
15 years 1 months ago
A Design Methodology for the Exploitation of High Level Communication Synthesis
In this paper we analyse some methodological concerns that have to be faced in a design flow which contains automatic synthesis phases from high-level, system descriptions. In par...
Francesco Bruschi, Massimo Bombana
JUCS
2006
93views more  JUCS 2006»
14 years 9 months ago
Synthesis of Optimal Workflow Structure
: Optimal synthesis of workflow structures, the formerly undefined problem, has been introduced. Mathematical programming model is presented for determining the cost optimal workfl...
József Tick, Zoltán Kovacs, Ferenc F...
DAC
1994
ACM
15 years 1 months ago
Memory Estimation for High Level Synthesis
Abstract -- This paper describes a new memory estimation technique for DSP applications written in an applicative language. Since no concept of storage is present in an applicative...
Ingrid Verbauwhede, Chris J. Scheers, Jan M. Rabae...
IISWC
2008
IEEE
15 years 4 months ago
Accelerating multi-core processor design space evaluation using automatic multi-threaded workload synthesis
The design and evaluation of microprocessor architectures is a difficult and time-consuming task. Although small, handcoded microbenchmarks can be used to accelerate performance e...
Clay Hughes, Tao Li