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TIP
2008
134views more  TIP 2008»
14 years 9 months ago
Higher Order SVD Analysis for Dynamic Texture Synthesis
Videos representing flames, water, smoke, etc. are often defined as dynamic textures: "textures" because they are characterized by redundant repetition of a pattern and &...
Roberto Costantini, Luciano Sbaiz, Sabine Süs...
ICCAD
1994
IEEE
137views Hardware» more  ICCAD 1994»
15 years 1 months ago
Dynamic scheduling and synchronization synthesis of concurrent digital systems under system-level constraints
We present in this paper a novel control synthesis technique for system-level specifications that are better described as a set of concurrent synchronous descriptions, their synch...
Claudionor José Nunes Coelho Jr., Giovanni ...
DSD
2010
IEEE
162views Hardware» more  DSD 2010»
14 years 8 months ago
A Parallel for Loop Memory Template for a High Level Synthesis Compiler
—We propose a parametrized memory template for applications with parallel for loops. The template’s parameters reflect important trade-offs made during system design. The temp...
Craig Moore, Wim Meeus, Harald Devos, Dirk Strooba...
EUROMICRO
2000
IEEE
15 years 2 months ago
Task Assignment and Scheduling under Memory Constraints
Many DSP and image processing embedded systems have hard memory constraints which makes it difficult to find a good task assignment and scheduling which fulfill these constrain...
Radoslaw Szymanek, Krzysztof Kuchcinski
DAC
2004
ACM
15 years 3 months ago
Fast and accurate parasitic capacitance models for layout-aware
Considering layout effects early in the analog design process is becoming increasingly important. We propose techniques for estimating parasitic capacitances based on look-up tabl...
Anuradha Agarwal, Hemanth Sampath, Veena Yelamanch...